Post-quantum digital signatures: two algorithms developed by DEIB among NIST competition finalists
Digital signatures play a crucial role in our everyday lives, safeguarding the authenticity of financial transactions, legal agreements, and digital media. However, the rise of quantum computing threatens the security of most currently deployed digital signature algorithms.
In response to this emerging risk, the U.S. National Institute of Standards and Technology (NIST) launched an international competition to establish standardized post-quantum digital signature algorithms. Following a year of global peer review, 14 finalists were chosen from an initial pool of 40 submissions.
Among these finalists are two notable schemes — CROSS (Codes and Restricted Objects Signature Scheme) and LESS (Linear Equivalence Signature Scheme) – both of which include Prof. Alessandro Barenghi and Prof. Gerardo Pelosi from the Department of Electronics, Information and Bioengineering at Politecnico di Milano as co-authors and lead contributors.
Alessandro Barenghi
Associate Professor
Alessandro Barenghi holds an M.Sc. (2007) and Ph.D. (2011) from Politecnico di Milano. His research focuses on computer, embedded, and network security, particularly applied cryptography. He also works on formal languages and compilers, specifically techniques for parallel parsing using operator precedence grammars.
Gerardo Pelosi
Associate Professor
Gerardo Pelosi received the Laurea degree in Telecommunications Engineering in 2003 and the Ph.D. degree in Computer Engineering and Information Technology in 2007 from Politecnico di Milano. His research fields cover (1) the area of information security and privacy including access control models, models for encrypted data management in relational databases, and secure data outsourcing; (2) the area of applied cryptography including side-channel cryptanalysis, system-level attacks, and efficient hardware and software design of cryptographic algorithms; other research interests are in designing security support into computer architectures and the logic synthesis of combinatorial circuits.