Architecture-aware Precision Tuning with Multiple Number Representation Systems

Abstract

Precision tuning trades accuracy for speed and energy savings, usually by reducing the data width, or by switching from floating point to fixed point representations. However, comparing the precision across different representations is a difficult task. We present a metric that enables this comparison, and employ it to build a methodology based on Integer Linear Programming for tuning the data type selection. We apply the proposed metric and methodology to a range of processors, demonstrating an improvement in performance (up to 9 x) with a very limited precision loss (<2.8% for 90% of the benchmarks) on the PolyBench benchmark suite.

Publication
2021 58th ACM/IEEE Design Automation Conference (DAC)
Daniele Cattaneo
Daniele Cattaneo
Postdoctoral Researcher
Stefano Cherubin
Ph.D. Student
Giovanni Agosta
Giovanni Agosta
Associate Professor

Giovanni Agosta, Associate Professor at Politecnico di Milano, holds a Laurea in Computer Engineering (2000) and a PhD in Information Technology (2004). His research focuses on compiler-computer architecture interaction, emphasizing performance, energy-efficiency, and security. He has authored 100+ papers, won multiple awards, and participated in 17 EU-funded projects.