Abstract
Systems performing scientific computing, data analysis, and machine learning tasks have a growing demand for application-specific accelerators that can provide high computational performance while meeting strict size and power requirements. However, the algorithms and applications that need to be accelerated are evolving at a rate that is incompatible with manual design processes based on hardware description languages. Agile hardware design tools based on compiler techniques can help by quickly producing an application-specific integrated circuit (ASIC) accelerator starting from a high-level algorithmic description. We present the software-defined accelerator (SODA) synthesizer, a modular and open-source hardware compiler that provides automated end-to-end synthesis from high-level software frameworks to ASIC implementation, relying on multilevel representations to progressively lower and optimize the input code. Our approach does not require the application developer to write any register-transfer level code, and it is able to reach up to 364 giga floating point operations per second (GFLOPS)/W efficiency (32-bit precision) on typical convolutional neural network operators.
Serena Curzel
Assistant Professor
Serena Curzel earned her M.Sc. in Electronics Engineering (2019) and PhD cum laude in Information Technology (2023) from Politecnico di Milano. Her PhD focused on Deep Learning acceleration in collaboration with Pacific Northwest National Laboratory. She later worked as a postdoc on FPGA acceleration for Big Data and aerospace. Since August 2024, she is an Assistant Professor at DEIB, researching design automation and High-Performance Computing, and is part of the PandA group on HLS methodologies.