Abstract
Finding a novel drug is a very long and complex procedure. Using computer simulations, it is possible to accelerate the preliminary phases by performing a virtual screening that filters a large set of drug candidates to a manageable number. This paper presents the implementations and comparative analysis of two GPU-optimized implementations of a virtual screening algorithm targeting novel GPU architectures. This work focuses on the analysis of parallel computation patterns and their mapping onto the target architecture. The first method adopts a traditional approach that spreads the computation for a single molecule across the entire GPU. The second uses a novel batched approach that exploits the parallel architecture of the GPU to evaluate more molecules in parallel. Experimental results showed a different behavior depending on the size of the database to be screened, either reaching a performance plateau sooner or having a more extended initial transient period to achieve a higher throughput (up to 5x), which is more suitable for extreme-scale virtual screening campaigns.
Publication
JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING

Assistant Professor
He earned his M.S. in Information Technology (2013) and Ph.D. cum laude in 2019 from Politecnico di Milano. A former Visiting Student at IBM Research (2015), he is now a postdoctoral researcher at DEIB, focusing on application autotuning, approximate computing, molecular docking, and drug discovery. He contributes to EXSCALATE software development.

Ph.D. Student
Gianmarco Accordi is a PhD student at Politecnico di Milano specializing in performance portability for high-performance computing and drug discovery simulations.

Full Professor
Gianluca Palermo received the M.Sc. degree in Electronic Engineering in 2002, and the Ph.D degree in Computer Engineering in 2006 from Politecnico di Milano. He is currently an associate professor at Department of Electronics and Information Technology in the same University. Previously he was also consultant engineer in the Low Power Design Group of AST – STMicroelectronics working on network on-chip and research assistant at the Advanced Learning and Research Institute (ALaRI) of the Università della Svizzera italiana (Switzerland). His research interests include design methodologies and architectures for embedded and HPC systems, focusing on AutoTuning aspects.