A Power Modeling and Estimation Framework for VLIW-based Embedded Systems

Abstract

This paper extends previous work by proposing a comprehensive framework for modeling and estimating the system-level power consumption for an embedded industrial parallel processor. The experimental results have demonstrated an average accuracy of 5% of the instruction-level estimation engine with respect to the RTL engine, with an average speed-up of four orders of magnitude.

Vittorio Zaccaria

Associate Professor

I am an associate professor at Politecnico di Milano and I have worked in embedded processor architecture R&D for one of the top semiconductor companies in the world. My group is currently working on topics related to embedded systems (hardware and software), security, cryptography, operating systems.