A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures

GUIDO MARCO Bertoni, LUCA ODDONE Breveglieri, Matteo Monchiero, Gianluca Palermo, Vittorio Zaccaria
January 2006
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Abstract

The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated hardware for cryptography is becoming a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, embedded cryptographic hardware became cost-effective. Nevertheless, it is worthy to note that nowadays, even hardwired cryptographic algorithms are not safe. Attacks based on power consumption and electromagnetic Analysis, such as SPA, DPA and EMA have been successfully used to retrieve secret information stored in cryptographic devices. Besides performance in terms of area and throughput, designer of embedded cryptographic hardware must worry about the leakage of their implementations. This paper deals with the leakage that occurs in the SW computation of AES on platforms equipepd with a cache memory through the miss events, which may allow to infer the secret key.

Type
Book section
Publication
New Trends in Cryptographic Systems
Gianluca Palermo
Gianluca Palermo
Full Professor

Gianluca Palermo received the M.Sc. degree in Electronic Engineering in 2002, and the Ph.D degree in Computer Engineering in 2006 from Politecnico di Milano. He is currently an associate professor at Department of Electronics and Information Technology in the same University. Previously he was also consultant engineer in the Low Power Design Group of AST – STMicroelectronics working on network on-chip and research assistant at the Advanced Learning and Research Institute (ALaRI) of the Università della Svizzera italiana (Switzerland). His research interests include design methodologies and architectures for embedded and HPC systems, focusing on AutoTuning aspects.

Vittorio Zaccaria
Vittorio Zaccaria
Associate Professor

I am an associate professor at Politecnico di Milano and I have worked in embedded processor architecture R&D for one of the top semiconductor companies in the world. My group is currently working on topics related to embedded systems (hardware and software), security, cryptography, operating systems.