Abstract
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only by off-the-shelf cores and is useful for porting and early validation of programs to the transactional memory programming model. We discuss the implementation of the software layer of this platform, propose an analysis of the system and compare it to a hardware lock based multiprocessor architecture, showing the trade-offs in terms of performance and programming complexity.
Gianluca Palermo
Full Professor
Gianluca Palermo received the M.Sc. degree in Electronic Engineering in 2002, and the Ph.D degree in Computer Engineering in 2006 from Politecnico di Milano. He is currently an associate professor at Department of Electronics and Information Technology in the same University. Previously he was also consultant engineer in the Low Power Design Group of AST – STMicroelectronics working on network on-chip and research assistant at the Advanced Learning and Research Institute (ALaRI) of the Università della Svizzera italiana (Switzerland). His research interests include design methodologies and architectures for embedded and HPC systems, focusing on AutoTuning aspects.