A Formal Model for Optimal Autonomous Task Hibernation in Constrained Embedded Systems

Abstract

This paper proposes and studies an autonomous hibernation technique and optimal hibernation policies aimed at minimizing the power consumption, while allowing stateful processing in constrained embedded systems with long-lasting lifetime requirements. To this purpose the paper models the energy contributions for hibernating the system—by saving the memory status on an external non-volatile memory and completely powering off the system—rather than maintaining the system in a sleep mode with memory retention—with problems of static leakage power—between two consecutive bursts of processing. Thanks to a simplified yet formal notion of system state, the paper rigorously determines the optimal conditions for deciding whether to hibernate or not the system during idle periods. Hibernation policies have been implemented as a module of the operating system and results demonstrate energy savings up to 50% compared to trivial hibernation approaches. Moreover, the hibernation policy proved to be robust and stable with respect to changes of the application parameters.

Publication
Digital System Design (DSD), 2013 Euromicro Conference on
Carlo Brandolese
Carlo Brandolese
Assistant Professor

Carlo Brandolese is a researcher at the Department of Electronics and Information of the Politecnico di Milano and a consultant researcher at Cefriel Research Centre. His research interests are focused on design and low-power methodologies for embedded systems.

William Fornaciari
William Fornaciari
Associate Professor

William Fornaciari has published six books and over 200 papers, earning five best paper awards, an IEEE certification, and three international patents on low power design. Since 1997, he has participated in 18 EU-funded projects. His research focuses on multi/many-core architectures, NoC, low power design, and more.